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Review of Scientific Instruments / Volume 82 / Issue 1 / NOTES
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Rev. Sci. Instrum. 82, 016102 (2011); http://dx.doi.org/10.1063/1.3524571 (3 pages)

Note: Scalable multiphoton coincidence-counting electronics

D. Branning1, S. Khanal1, Y. H. Shin1, B. Clary1, and M. Beck2

1Department of Physics, Trinity College, 300 Summit St., Hartford, Connecticut 06106, USA
2Department of Physics, Whitman College, Walla Walla, Washington 99362, USA

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(Received 30 September 2010; accepted 14 November 2010; published online 18 January 2011)

We present a multichannel coincidence-counting module for use in quantum optics experiments. The circuit takes up to four transistor–transistor logic pulse inputs and counts either twofold, threefold, or fourfold coincidences, within a user-selected coincidence-time window as short as 12 ns. The module can accurately count eight sets of multichannel coincidences, for input rates of up to 84 MHz. Due to their low cost and small size, multiple modules can easily be combined to count arbitrary M-order coincidences among N inputs.

© 2011 American Institute of Physics

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KEYWORDS and PACS

Keywords

counting circuits, quantum optics, transistor-transistor logic

PACS

ARTICLE DATA

Digital Object Identifier
http://dx.doi.org/10.1063/1.3524571

PUBLICATION DATA

ISSN

0034-6748 (print)  
1089-7623 (online)

Publisher

$abstract.society.value is a Member of CrossRef American Institute of Physics

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  12. Resources for the construction and operation of this CCM, including an assembly guide, an operating manual, and data acquisition software (for LABVIEW or as a standalone executable), may be freely downloaded from our web site: www.trincoll.edu/~dbrannin.
  13. See supplementary material at http://dx.doi.org/10.1063/1.3524571 for the complete ciruit diagram and photographs of the assembled CCM. [EPAPS]
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Figures (click on thumbnails to view enlargements)

FIG.1
Four-way AND gate with OR gates on each input. For each input (A, B, C, D), a switch connects one of the OR inputs to 0 or 5 V so that the input is either included (0 V) or excluded (5 V) from the logic at the AND gate.

FIG.1 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.2
Block diagram of the CCM architecture. Each input has a selectable impedance of 50 Ω or 1 kΩ. The input pulses are shortened and then fanned out to form the inputs to eight copies of the circuit in Fig. 1. The eight output channels are sent to BNC outputs, and also to the counting registers on the FPGA.

FIG.2 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.3
(Color online) Mean single-channel counting rate in the CCM vs mean input pulse rate from an LFSR, acquired during 10-s intervals. The pseudorandom input pulses were counted independently with external 50-MHz counters. A least-squares fit (solid line) of the form y = mx yielded m = 1.002 ± 0.002. Similar results were observed in the other input channels.

FIG.3 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.4
(Color online) Coincidence rates RAB in the CCM for pseudorandom input rates RA and RB on channels A and B, as a function of x = math for various pulse width settings. A least-squares fit (solid line) to the parabola y = τcx2 yielded coincidence times τc = 12.033 ± 0.006, 14.56 ± 0.02, and 20.38 ± 0.09 ns for settings 00, 01, and 10. Similar results were observed for coincidences among the other input channels.

FIG.4 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

Supplemental Files (EPAPS)



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